Fecha de lectura | 31 may 2012 |
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Idioma original | Indefinido/desconocido |
Institución de lectura |
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Supervisor | Jorge Francisco Suñe Tarruella (Director/a) & David Jimenez Jimenez (Director/a) |
Study and Modeling of Multi-gate Transistors in the Context of CMOS Technology Scaling
Tesis doctoral