Zero-level packaging of MEMS in standard CMOS technology

E. Marigó, J. L. Lopez, G. Murillo, F. Torres, J. Giner, A. Uranga, G. Abadal, J. Esteve, N. Barniol

Producción científica: Contribución a una revistaArtículoInvestigaciónrevisión exhaustiva

16 Citas (Scopus)

Resumen

A novel technique for global packaging of MEMS devices using standard CMOS technology is presented. A MEMS polysilicon resonator is fabricated and on-chip packaged using two metal layers already available from the CMOS technology. A simple buffered HF wet etching process is performed in house to release the MEMS resonator while metal deposition is used to vacuum seal the zero-level package. Both post-processing steps are carried out on CMOS chips. The design of the metal layers is carefully done in order to avoid the degradation of the MEMS. The electrical frequency response of the resonator is used for testing the performance of the final package. Electrical measurements and physical characterization demonstrate proper performance of the MEMS resonator and package.

Idioma originalInglés
Número de artículo064009
PublicaciónJournal of Micromechanics and Microengineering
Volumen20
N.º6
DOI
EstadoPublicada - 1 jun 2010

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