SPICE Modeling of Memristive Devices-Based Neural Networks

This paper reports a SPICE-based framework for circuit-level simulation of hybrid memristor/CMOS neural networks. By relying on ex-situ training, our approach systematizes the circuital representation of a neural network given a set of high-level design parameters. As a key element of simulations, we put special emphasis on the use of a recently developed compact model to represent the electrical characteristics of memristors. The model is called the Dynamic Memdiode Model (DMM) and is based on L. Chua's theory for memristive devices. The model comprises two equations: one equation for the electron transport and one equation for the displacement of metal ions or oxygen vacancies caused by the application of the external electric field. We show how the proposed simulation framework allows to assess the influence of the circuit parasitics as well as the device non-idealities on the performance metrics of neural networks.