TY - JOUR
T1 - Lifetime estimation of analog circuits from the electrical characteristics of stressed MOSFETs
AU - Nafría, M.
AU - Ghidini, G.
AU - Gerardin, S.
AU - Rodríguez, R.
AU - Paccagnella, A.
AU - Aymerich, X.
AU - Martín-Martínez, J.
AU - Cester, A.
PY - 2007/8/1
Y1 - 2007/8/1
N2 - In this work, the impact of dielectric degradation in the MOSFET electrical characteristics after different levels of Fowler-Nordheim (FN) stress has been studied. A decrease in ISAT and an increase of VT have been observed. The interface trap density has been extracted from the sub-threshold slope of ID-VGS curves. The results show a direct relation between the generated interfacial traps and the observed changes in saturation current and threshold voltage. The wear out effects in the devices have been extrapolated to operation voltages, pointing out that the transistors can fulfill the reliability criteria, even when working in analog applications. © 2007 Elsevier Ltd. All rights reserved.
AB - In this work, the impact of dielectric degradation in the MOSFET electrical characteristics after different levels of Fowler-Nordheim (FN) stress has been studied. A decrease in ISAT and an increase of VT have been observed. The interface trap density has been extracted from the sub-threshold slope of ID-VGS curves. The results show a direct relation between the generated interfacial traps and the observed changes in saturation current and threshold voltage. The wear out effects in the devices have been extrapolated to operation voltages, pointing out that the transistors can fulfill the reliability criteria, even when working in analog applications. © 2007 Elsevier Ltd. All rights reserved.
UR - https://dialnet.unirioja.es/servlet/articulo?codigo=2376727
UR - https://www.scopus.com/pages/publications/34548704303
U2 - 10.1016/j.microrel.2007.07.088
DO - 10.1016/j.microrel.2007.07.088
M3 - Article
SN - 0026-2714
VL - 47
SP - 1349
EP - 1352
JO - Microelectronics Reliability
JF - Microelectronics Reliability
ER -