TY - JOUR
T1 - Channel-hot-carrier degradation and bias temperature instabilities in CMOS inverters
AU - Martín-Martínez, Javier
AU - Gerardin, Simone
AU - Amat, Esteve
AU - Rodríguez, Rosana
AU - Nafría, Montserrat
AU - Aymerich, Xavier
AU - Paccagnella, Alessandro
AU - Ghidini, Gabriella
PY - 2009/9/7
Y1 - 2009/9/7
N2 - The degradation of NMOS and PMOS transistors within CMOS inverters has been analyzed. Channel-hot-carrier (CHC) degradation and/or bias temperature instabilities (BTIs) are identified as aging mechanisms, and their implications at the device and circuit levels are discussed. Device- and circuit-level results have been linked using the BSIM4 SPICE model. © 2009 IEEE.
AB - The degradation of NMOS and PMOS transistors within CMOS inverters has been analyzed. Channel-hot-carrier (CHC) degradation and/or bias temperature instabilities (BTIs) are identified as aging mechanisms, and their implications at the device and circuit levels are discussed. Device- and circuit-level results have been linked using the BSIM4 SPICE model. © 2009 IEEE.
KW - BTI
KW - CMOS
KW - Channel hot carriers
KW - Reliability
U2 - 10.1109/TED.2009.2026206
DO - 10.1109/TED.2009.2026206
M3 - Article
SN - 0018-9383
VL - 56
SP - 2155
EP - 2159
JO - IEEE Transactions on Electron Devices
JF - IEEE Transactions on Electron Devices
ER -