Nanoscale Characterization and simulation of advanced CMOS and Emerging Devices variability

Abstract

During the last decades, electronic devices have become essential for our society and can be found around us in all aspects of our daily life. A paradigmatic exponent of this is the Internet of Things (IoT), which ranges from smart appliances in our houses to healthcare applications and devices. Indeed, this has been possible thanks to the technological advance in fabrication techniques; which has allowed, following the trend of Moore’s Law, for higher integration levels. This last has led to the development of several devices and/or technologies (e.g.: smartphones, virtual reality, supercomputers…), which has changed our way of life all around the world and has led humanity to levels of comfort that were unimaginable a few decades ago. Nonetheless, the requirement of even higher integration levels to keep up with the Moore’s is pushing the current technology to its fundamental limit, i.e. the atomic size. It is in that context, that to save Moore’s law, besides the continuous scaling of MOSFETs dimensions, new structures and materials (as emerging devices) are being explored, as those based on graphene and/or organic materials. However, the variability found in these devices and reliability issues have become increasingly important with each technological node and, specially, with emerging devices. Finally, it is important to remark that variability sources and aging mechanisms are usually related to nanoscale properties of the materials, thus requiring nanoscale tools for their analysis as Atomic Force Microscopy (AFM) related techniques._x000D_ This thesis is focused on this topic. We have developed/improved different setups and/or methodologies to correlated nanoscale (observed with AFM related techniques) variability sources or aging mechanisms with their impact on device level characteristics of the corresponding devices. In particular, they have been applied to MOSFETs and emerging devices as graphene-FETs and Organic TFT._x000D_ The Thesis is structured as follows; Chapter 1 presents the fundamental concepts to understand the results presented in the thesis, In Chapter 2, we present in detail the advanced characterization techniques used throughout this thesis, such as Kelvin Prove Force microscopy (KPFM) and Conductive Atomic Force Microscopy (CAFM), used to obtain nanoscale information. Chapter 3 is devoted to the evaluation of the effect of the polycrystallinity of gate metals and high-k dielectrics on the MOSFETs variability, by combining experimental data obtained at the nanoscale with CAFM and KPFM and simulations. In Chapter 4, we present a new smart and flexible experimental set-up that combines device level and nanoscale measurements on fully processed devices, by using a Semiconductor Parameter Analyzer and CAFM, which applies to evaluate at the nanoscale and at device level the effects of an electrical stress in graphene based transistors. Finally, in Chapter 5 we present a KPFM and device level study of the impact of electrical stress on the properties of the OTFTs.

Date of Award	24 Nov 2022
Original language	Spanish
Supervisor	Marc Porti Pujal (Director)