Design and Optimization of a Low-Power RISC-V Processor for NDIR Measurement of CO2 Levels

Abstract

In various fields like environmental monitoring, healthcare, and the IoT, the increasing demand for low-power devices has led to growing interest in the development of high-performance and energy-efficient processors. In this ongoing quest, the RISC-V architecture emerges as a promising solution. In recent years, the RISC-V architecture has gained popularity as an open-source and customizable alternative to proprietary instruction set architectures (ISAs)._x000D_ _x000D_ This thesis presents the comprehensive design, implementation, and performance analysis of RisCO2, a custom-designed soft-core RISC-V microprocessor. It is specially optimized for energy-efficient IoT devices, with a focus on its feasibility for Non-Dispersive Infrared (NDIR) CO2 sensors in environmental monitoring and air quality control. The research builds on the extensible and modular architecture of the RISC-V instruction set to develop a processor that is tailored for low-power applications. RisCO2 has been also integrated into the PULPino SoC, which provides a comprehensive system for evaluating its energy efficiency._x000D_ _x000D_ The research employs an iterative design process using an FPGA implementation that incrementally incorporates architectural modifications aimed at reducing both power consumption and computation time, all without sacrificing performance. The process began with a basic RV32I core, allowing us to understand the fundamental characteristics of the RISC-V ISA as well as to acknowledge the flexibility provided by its modular design. As the project progressed, we selectively incorporated more specialized extensions and functional units into the processor._x000D_ _x000D_ We have placed heavy emphasis on the design's verification and validation. Through RTL simulations, we confirmed the processor's compliance with RISC-V ISA specifications and its functional integrity. We further ensured consistency in instruction execution by comparing RTL simulations in Vivado with RISC-V ISA simulations in SEGGER Embedded Studio. In subsequent design stages, we engaged in a meticulous process to prune extraneous hardware logic and simplify RTL modules, streamlining the processor's architecture while also reducing both area and energy consumption._x000D_ _x000D_ The application used for benchmarking the processor employs the well-known digital quadrature demodulation technique to extract information from the sensor's digital samples. It then calculates the CO2 concentration based on the Beer-Lambert law, which governs the behavior of light absorption in gases._x000D_ _x000D_ Additionally, the study conducts a comparative analysis with established RISC-V reference processors: Ri5cy, CV32E40P, Zero-riscy, and Micro-riscy. This comparison aims to assess how RisCO2 performs when integrated into real-world SoC frameworks like PULPino, providing a more comprehensive perspective on the design of energy-efficient processors. To perform this assessment, distinct projects were created targeting each of these reference processors. Through this approach, the processor's performance, resource utilization, and power consumption were scrutinized in detail._x000D_ _x000D_ Following implementation, in-depth power breakdown analyses were conducted using switching activity data from circuit nets, offering precise estimates of power consumption. This examination provided insights into how power consumption is distributed across the various processor modules. Finally, synthesis and area utilization were analyzed using TSMC's 65nm process technology library, utilizing the Cadence Genus synthesis tool for the assessment._x000D_ _x000D_ The results show that RisCO2 achieves a significant reduction in energy consumption while delivering performance comparable to that of the reference processors. These findings highlight the capability of custom RISC-V processors like RisCO2 to serve as effective solutions in gas concentration sensing applications. Such processors not only offer meaningful energy savings but also meet the requirements for efficient, low-power edge computing. Moreover, the implications of this study extend to the design of energy-efficient processors in diverse applications, including the IoT, wearable technology, and mobile devices._x000D_ _x000D_ In summary, this work contributes to the ongoing efforts aimed at improving processor energy efficiency and promoting sustainable computing, offering both a methodological approach and empirical data that can guide the development of high-performance, low-power processors.

Date of Award	18 Dec 2023
Original language	English
Supervisor	Narcis Avellana Tarrats (Director), Lluís Antoni Terés Terés (Director) & David Castells Rufas (Director)