Since the microelectronic revolution, its technological evolution has been aimed at searching for more compact, reliable, and rugged electronic devices or integrated systems, offering as much performances and functionalities as possible at a lower cost. This has not only allowed them to complement or replace in many applications other systems based on mechanic, electromechanic, hydraulic, and pneumatic principles (e.g., communication systems, more electric aircrafts or railway traction), but also has fostered innovating working scenarios (e.g., internet of things or autonomous vehicles) facing societal challenges. However, these targets entailed several consequences in terms of microelectronic devices and systems manufacturability (optimize fabrication process), reliability (virtual prototyping), and testability (system assessment and performance evaluation), in which local functional inspection is crucial and partially ensured by accessing pads. However, local accessibility to the whole die is not possible externally, and has been worsened by the current monolithical integration capabilities, posing new challenges in the reliability and performance assessment at die level. In this scenario, local off-chip characterization with non-invasive spatially-resolved imaging techniques has become one of the most promising solutions. As a solution to such problems in more-than-Moore domain, this work proposes to thermally study the surface of such Microelectronic devices and systems with an imaging infrared thermography (IRT) system by applying lock-in detection strategies. When modulating heat sources in frequency, lock-in detection improves the sensitivity of the IRT system, and depending on the modulation and frequency, allows sensing thermal variations below noise equivalent thermal difference (NETD) limit of the camera, without any influence of boundary conditions and blurring effects due to heat spreading. Consequently, acquired thermal maps make possible locally monitoring weak heat sources not only for failure analysis (mainstream use, state-of-the-art), but also for electrical testing in frequency domain, figures of merit extraction, or device physical parameters determination (novelty of this work). Facing these challenges have supposed understanding the Physics underlying the performed measurements, designing and implementing a thermal and electrical biasing system for the samples, and setting up an Infrared Lock-in Thermography (IR-LIT) system, optimizing the thermal image acquisition procedure. In order to access the potential in the current Microelectronic scenario, the following case studies have been addressed (going from less to more complex situations): i) intradie and packaging parasitic phenomena inspection (parasitics deembedding), ii) wide bandgap (WBG) power devices failure analysis under overload conditions, iii) local abnormal electrical behavior study in WBG power devices , iv) thermal and electrical local testing of microwaves and RF power amplifiers, v) functional and consumption analysis of RFID wireless pad-free sensor systems. When required, the main conclusions of each study have been feedback to design engineers to improve or make more rugged the inspected device or system. As a result, the proposed approach has been assessed and demonstrated as a powerful and innovative tool, not only for failure analysis and electrical parameters extraction in power electronics, but also to perform a deeper behavioral study on more complex microelectronic systems to determine their possible electrical misbehaviors and propose design improvements. Besides, the presented approaches do not reduce to infrared acquisition systems, but also allow being implemented with any thermal monitoring equipment with higher spatial resolution.
| Date of Award | 7 Jul 2016 |
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| Original language | English |
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| Supervisor | Xavier Perpinyà Gibert (Director) & Miquel Vellvehí Hernández (Director) |
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