The impact of gate-oxide breakdown SRAM stability

R. Rodríguez; J. H. Stathis; B. P. Linder; S. Kowalczyk; C. T. Chuang; R. V. Joshi; G. Northrop; K. Bernstein; A. J. Bhavnagarwala; S. Lombardo

doi:10.1109/LED.2002.802600

The impact of gate-oxide breakdown SRAM stability

R. Rodríguez, J. H. Stathis, B. P. Linder, S. Kowalczyk, C. T. Chuang, R. V. Joshi, G. Northrop, K. Bernstein, A. J. Bhavnagarwala, S. Lombardo

Research output: Contribution to journal › Article › Research › peer-review

124 Citations (Scopus)

Abstract

We have investigated the effects of oxide soft breakdown (SBD) on the stability of CMOS 6T SRAM cells. Gate-to-diffusion leakage currents of 20-50 μA at the n-FET source can result in a 50% reduction of noise margin. Breakdown at other locations in the cell may be less deleterious depending on n-FET width. This approach gives targets for tolerable values of leakage caused by gate-oxide breakdown.

Original language	English
Pages (from-to)	559-561
Journal	IEEE Electron Device Letters
Volume	23
Issue number	9
DOIs	https://doi.org/10.1109/LED.2002.802600
Publication status	Published - 1 Sep 2002

Keywords

Dielectric breakdown
Hard breakdown
Leakage currents
MOS devices
Oxide reliability
Soft breakdown
SRAM

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10.1109/LED.2002.802600

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@article{dfdc0443431c4c1db7ba78372afd6c31,

title = "The impact of gate-oxide breakdown SRAM stability",

abstract = "We have investigated the effects of oxide soft breakdown (SBD) on the stability of CMOS 6T SRAM cells. Gate-to-diffusion leakage currents of 20-50 μA at the n-FET source can result in a 50% reduction of noise margin. Breakdown at other locations in the cell may be less deleterious depending on n-FET width. This approach gives targets for tolerable values of leakage caused by gate-oxide breakdown.",

keywords = "Dielectric breakdown, Hard breakdown, Leakage currents, MOS devices, Oxide reliability, Soft breakdown, SRAM",

author = "R. Rodr{\'i}guez and Stathis, {J. H.} and Linder, {B. P.} and S. Kowalczyk and Chuang, {C. T.} and Joshi, {R. V.} and G. Northrop and K. Bernstein and Bhavnagarwala, {A. J.} and S. Lombardo",

year = "2002",

month = sep,

day = "1",

doi = "10.1109/LED.2002.802600",

language = "English",

volume = "23",

pages = "559--561",

journal = "IEEE Electron Device Letters",

issn = "0741-3106",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

number = "9",

}

TY - JOUR

T1 - The impact of gate-oxide breakdown SRAM stability

AU - Rodríguez, R.

AU - Stathis, J. H.

AU - Linder, B. P.

AU - Kowalczyk, S.

AU - Chuang, C. T.

AU - Joshi, R. V.

AU - Northrop, G.

AU - Bernstein, K.

AU - Bhavnagarwala, A. J.

AU - Lombardo, S.

PY - 2002/9/1

Y1 - 2002/9/1

N2 - We have investigated the effects of oxide soft breakdown (SBD) on the stability of CMOS 6T SRAM cells. Gate-to-diffusion leakage currents of 20-50 μA at the n-FET source can result in a 50% reduction of noise margin. Breakdown at other locations in the cell may be less deleterious depending on n-FET width. This approach gives targets for tolerable values of leakage caused by gate-oxide breakdown.

AB - We have investigated the effects of oxide soft breakdown (SBD) on the stability of CMOS 6T SRAM cells. Gate-to-diffusion leakage currents of 20-50 μA at the n-FET source can result in a 50% reduction of noise margin. Breakdown at other locations in the cell may be less deleterious depending on n-FET width. This approach gives targets for tolerable values of leakage caused by gate-oxide breakdown.

KW - Dielectric breakdown

KW - Hard breakdown

KW - Leakage currents

KW - MOS devices

KW - Oxide reliability

KW - Soft breakdown

KW - SRAM

U2 - 10.1109/LED.2002.802600

DO - 10.1109/LED.2002.802600

M3 - Article

VL - 23

SP - 559

EP - 561

JO - IEEE Electron Device Letters

JF - IEEE Electron Device Letters

SN - 0741-3106

IS - 9

ER -

The impact of gate-oxide breakdown SRAM stability

Abstract

Keywords

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