Template and Mapping of a low-power reconfigurable Address Generation Unit

Guillermo Talavera, Ittetsu Taniguchi, Antonio Portero, Jordi Carrabina, Francky Catthoor

Research output: Contribution to journal › Article › Research

Original language	English
Pages (from-to)	-
Journal	Submited to the IEEE Transactions on VLSI Systems
Publication status	Published - 1 Jan 2011

Cite this

TY - JOUR

T1 - Template and Mapping of a low-power reconfigurable Address Generation Unit

AU - Talavera, Guillermo

AU - Taniguchi, Ittetsu

AU - Portero, Antonio

AU - Carrabina, Jordi

AU - Catthoor, Francky

PY - 2011/1/1

Y1 - 2011/1/1

M3 - Article

SP - -

JO - Submited to the IEEE Transactions on VLSI Systems

JF - Submited to the IEEE Transactions on VLSI Systems

ER -