Abstract
In this article, a symbolic simulator able to deal with several type of digital circuits, is presented and analyzed. The simulator uses logical functions which represent the discrete voltage level at the nodes. These functions are characterized by two binary boolean functions, which allows to determine the conditions under which the associated nodes are connected to either low or high logic level. The proposed simulator allows the designer of transistor-level circuits to know the logical implications of desired modifications.
| Original language | English |
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| Pages (from-to) | 285-294 |
| Journal | Informacion Tecnologica |
| Volume | 9 |
| Issue number | 3 |
| Publication status | Published - 1 Jan 1998 |