Short destabilizing paths in timing verification

Research output: Chapter in Book › Chapter › Research

Original language	English
Title of host publication	Proceedings 1994 IEEE International Conference on Computer Design: VLSI in Computers and Processors
Place of Publication	(US)
Pages	160-163
Number of pages	3
Edition	1
DOIs	https://doi.org/10.1109/ICCD.1994.331879
Publication status	Published - 1 Jan 1994

Access to Document

@inbook{e1ebed11384e4d72ad733750a163bb99,

title = "Short destabilizing paths in timing verification",

author = "{Ribas Xirgo}, Lluis and {Pesets Llopis}, Rafael and {Carrabina Bordoll}, Jordi",

year = "1994",

month = jan,

day = "1",

doi = "10.1109/ICCD.1994.331879",

language = "English",

pages = "160--163",

booktitle = "Proceedings 1994 IEEE International Conference on Computer Design: VLSI in Computers and Processors",

edition = "1",

}

TY - CHAP

T1 - Short destabilizing paths in timing verification

AU - Ribas Xirgo, Lluis

AU - Pesets Llopis, Rafael

AU - Carrabina Bordoll, Jordi

PY - 1994/1/1

Y1 - 1994/1/1

U2 - 10.1109/ICCD.1994.331879

DO - 10.1109/ICCD.1994.331879

M3 - Chapter

SP - 160

EP - 163

BT - Proceedings 1994 IEEE International Conference on Computer Design: VLSI in Computers and Processors

CY - (US)

ER -