Pre- and post-BD electrical conduction of stressed HfO2/SiO2 MOS gate stacks observed at the nanoscale

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3 Citations (Scopus)

Original language	English
Pages (from-to)	1390-1393
Journal	Microelectronics and Reliability
Volume	45
DOIs	https://doi.org/10.1016/j.microrel.2005.07.105
Publication status	Published - 1 Jan 2005

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@article{d8246e9882444dcdacc003e6133c5974,

title = "Pre- and post-BD electrical conduction of stressed HfO2/SiO2 MOS gate stacks observed at the nanoscale",

author = "L. Aguilera and M. Porti and M. Nafr{\'i}a and X. Aymerich",

year = "2005",

month = jan,

day = "1",

doi = "10.1016/j.microrel.2005.07.105",

language = "English",

volume = "45",

pages = "1390--1393",

journal = "Microelectronics Reliability",

issn = "0026-2714",

publisher = "Elsevier Limited",

}

TY - JOUR

T1 - Pre- and post-BD electrical conduction of stressed HfO2/SiO2 MOS gate stacks observed at the nanoscale

AU - Aguilera, L.

AU - Porti, M.

AU - Nafría, M.

AU - Aymerich, X.

PY - 2005/1/1

Y1 - 2005/1/1

U2 - 10.1016/j.microrel.2005.07.105

DO - 10.1016/j.microrel.2005.07.105

M3 - Article

VL - 45

SP - 1390

EP - 1393

JO - Microelectronics Reliability

JF - Microelectronics Reliability

SN - 0026-2714

ER -