| Original language | English |
|---|---|
| Title of host publication | International Workshop on Logic and Architecture Syntesis |
| Place of Publication | Grenoble (FR) |
| Pages | 97-106 |
| Number of pages | 9 |
| Edition | 1 |
| Publication status | Published - 1 Jan 1995 |
Performance-Driven logic synthesis
J. Riera, L. Ribas, A.J. Velasco, J. Carrabina
Research output: Chapter in Book › Chapter › Research