Performance-Driven logic synthesis

J. Riera, L. Ribas, A.J. Velasco, J. Carrabina

    Research output: Chapter in BookChapterResearch

    Original languageEnglish
    Title of host publicationInternational Workshop on Logic and Architecture Syntesis
    Place of PublicationGrenoble (FR)
    Pages97-106
    Number of pages9
    Edition1
    Publication statusPublished - 1 Jan 1995

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