TY - JOUR
T1 - Performance analysis techniques for multi-soft-core and many-soft-core systems
AU - Castells-Rufas, David
AU - Fernandez-Alonso, Eduard
AU - Carrabina, Jordi
PY - 2012/8/17
Y1 - 2012/8/17
N2 - Multi-soft-core systems are a viable and interesting solution for embedded systems that need a particular tradeoff between performance, flexibility and development speed. As the growing capacity allows it, many-soft-cores are also expected to have relevance to future embedded systems. As a consequence, parallel programming methods and tools will be necessarily embraced as a part of the full system development process. Performance analysis is an important part of the development process for parallel applications. It is usually mandatory when you want to get a desired performance or to verify that the system is meeting some real-time constraints. One of the usual techniques used by the HPC community is the postmortem analysis of application traces. However, this is not easily transported to the embedded systems based on FPGA due to the resource limitations of the platforms. We propose several techniques and some hardware architectural support to be able to generate traces on multiprocessor systems based on FPGAs and use them to optimize the performance of the running applications. Copyright © 2012 David Castells-Rufas et al.
AB - Multi-soft-core systems are a viable and interesting solution for embedded systems that need a particular tradeoff between performance, flexibility and development speed. As the growing capacity allows it, many-soft-cores are also expected to have relevance to future embedded systems. As a consequence, parallel programming methods and tools will be necessarily embraced as a part of the full system development process. Performance analysis is an important part of the development process for parallel applications. It is usually mandatory when you want to get a desired performance or to verify that the system is meeting some real-time constraints. One of the usual techniques used by the HPC community is the postmortem analysis of application traces. However, this is not easily transported to the embedded systems based on FPGA due to the resource limitations of the platforms. We propose several techniques and some hardware architectural support to be able to generate traces on multiprocessor systems based on FPGAs and use them to optimize the performance of the running applications. Copyright © 2012 David Castells-Rufas et al.
U2 - https://doi.org/10.1155/2012/736347
DO - https://doi.org/10.1155/2012/736347
M3 - Article
VL - 2012
JO - International Journal of Reconfigurable Computing
JF - International Journal of Reconfigurable Computing
SN - 1687-7195
M1 - 736347
ER -