Optimization on cell-library design for digital Application Specific Printed Electronics Circuits

M. Mashayekhi Llamas, J. Carrabina, J. Matos, A. Reis

Research output: Chapter in Book › Chapter › Research

Original language	English
Title of host publication	Power and Timing Modeling, Optimization and Simulation (PATMOS), 2014 24th International Workshop on
Editors	DOI 10.1109/PATMOS.2014.6951885
Place of Publication	(US)
Pages	1-6
Number of pages	5
Edition	1
Publication status	Published - 1 Jan 2014

Cite this

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title = "Optimization on cell-library design for digital Application Specific Printed Electronics Circuits",

author = "Llamas, {M. Mashayekhi} and J. Carrabina and J. Matos and A. Reis",

year = "2014",

month = jan,

day = "1",

language = "English",

pages = "1--6",

editor = "{DOI 10.1109/PATMOS.2014.6951885}",

booktitle = "Power and Timing Modeling, Optimization and Simulation (PATMOS), 2014 24th International Workshop on",

edition = "1",

}

Optimization on cell-library design for digital Application Specific Printed Electronics Circuits. / Llamas, M. Mashayekhi; Carrabina, J.; Matos, J. et al.
Power and Timing Modeling, Optimization and Simulation (PATMOS), 2014 24th International Workshop on. ed. / DOI 10.1109/PATMOS.2014.6951885. 1. ed. (US), 2014. p. 1-6.

Research output: Chapter in Book › Chapter › Research

TY - CHAP

T1 - Optimization on cell-library design for digital Application Specific Printed Electronics Circuits

AU - Llamas, M. Mashayekhi

AU - Carrabina, J.

AU - Matos, J.

AU - Reis, A.

PY - 2014/1/1

Y1 - 2014/1/1

M3 - Chapter

SP - 1

EP - 6

BT - Power and Timing Modeling, Optimization and Simulation (PATMOS), 2014 24th International Workshop on

A2 - DOI 10.1109/PATMOS.2014.6951885, null

CY - (US)

ER -