On the Reuse of Symbolic Simulation Results for Incremental Equivalence Verification of Switch-Level Circuits: Desing, Automation and Test in Europe (Conference Procedings)

Lluis Ribas Xirgo; Jordi Carrabina Bordoll; null -

On the Reuse of Symbolic Simulation Results for Incremental Equivalence Verification of Switch-Level Circuits: Desing, Automation and Test in Europe (Conference Procedings)

Lluis Ribas Xirgo, Jordi Carrabina Bordoll, - (Editor)

Research output: Book/Report › Proceeding › Research

Original language	Undefined/Unknown
Place of Publication	Los Alamitos, CA (USA) (US)
Number of pages	6
Publication status	Published - Jun 1998

Cite this

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title = "On the Reuse of Symbolic Simulation Results for Incremental Equivalence Verification of Switch-Level Circuits: Desing, Automation and Test in Europe (Conference Procedings)",

author = "{Ribas Xirgo}, Lluis and {Carrabina Bordoll}, Jordi",

editor = "-",

year = "1998",

month = jun,

language = "Indefinido/desconocido",

}

TY - BOOK

T1 - On the Reuse of Symbolic Simulation Results for Incremental Equivalence Verification of Switch-Level Circuits

T2 - Desing, Automation and Test in Europe (Conference Procedings)

AU - Ribas Xirgo, Lluis

AU - Carrabina Bordoll, Jordi

A2 - -, null

PY - 1998/6

Y1 - 1998/6

M3 - Libro de Actas

BT - On the Reuse of Symbolic Simulation Results for Incremental Equivalence Verification of Switch-Level Circuits

CY - Los Alamitos, CA (USA) (US)

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