TY - JOUR
T1 - On the hardware implementation of the arithmetic elements of the pairwise orthogonal transform
AU - Santos, Lucana
AU - Blanes, Ian
AU - García, Aday
AU - Serra-Sagristà, Joan
AU - López, José
AU - Sarmiento, Roberto
PY - 2015/1/1
Y1 - 2015/1/1
N2 - © The Authors. The pairwise orthogonal transform (POT) is an attractive alternative to the Kahrunen- Loève transform for spectral decorrelation in on-board multispectral and hyperspectral image compression due to its reduced complexity. This work validates that the low complexity of the POT makes it feasible for a space-qualified field-programmable gate array (FPGA) implementation. A register transfer level description of the arithmetic elements of the POT is provided with the aim of achieving a low occupancy of resources and making it possible to synthesize the design on a space-qualified RTAX2000S and RTAX2000S-DSP. In order to accomplish these goals, the operations of the POT are fine-tuned such that their implementation footprint is minimized while providing equivalent coding performance. The most computationally demanding operations are solved by means of a lookup table. An additional contribution of this paper is a bit-exact description of the mathematical equations that are part of the transform, defined in such a way that they can be solved with integer arithmetic and implementations that can be easily cross-validated. Experimental results are presented, showing that it is feasible to implement the components of the POTon the mentioned FPGA.
AB - © The Authors. The pairwise orthogonal transform (POT) is an attractive alternative to the Kahrunen- Loève transform for spectral decorrelation in on-board multispectral and hyperspectral image compression due to its reduced complexity. This work validates that the low complexity of the POT makes it feasible for a space-qualified field-programmable gate array (FPGA) implementation. A register transfer level description of the arithmetic elements of the POT is provided with the aim of achieving a low occupancy of resources and making it possible to synthesize the design on a space-qualified RTAX2000S and RTAX2000S-DSP. In order to accomplish these goals, the operations of the POT are fine-tuned such that their implementation footprint is minimized while providing equivalent coding performance. The most computationally demanding operations are solved by means of a lookup table. An additional contribution of this paper is a bit-exact description of the mathematical equations that are part of the transform, defined in such a way that they can be solved with integer arithmetic and implementations that can be easily cross-validated. Experimental results are presented, showing that it is feasible to implement the components of the POTon the mentioned FPGA.
KW - hyperspectral image
KW - lossy compression
KW - pairwise orthogonal transform
KW - space-qualified field-programmable gate array
U2 - https://doi.org/10.1117/1.JRS.9.097496
DO - https://doi.org/10.1117/1.JRS.9.097496
M3 - Article
VL - 9
JO - Journal of Applied Remote Sensing
JF - Journal of Applied Remote Sensing
SN - 1931-3195
IS - 1
M1 - 097496
ER -