TY - JOUR
T1 - 'On-the-fly' measurements of CMOS inverters performance degradation under pulsed stress
AU - Crespo-Yepes, A.
AU - Ramos, R.
AU - Barajas, E.
AU - Aragones, X.
AU - Mateo, D.
AU - Martin-Martinez, J.
AU - Rodriguez, R.
AU - Nafria, M.
N1 - Publisher Copyright:
© 2020 IEEE.
PY - 2020/9/1
Y1 - 2020/9/1
N2 - In this work, an 'on-the-fly' type technique for the characterization and monitoring of the CMOS inverter degradation, simultaneously to the application of pulsed voltage stresses, is presented. This technique allows analyzing the CMOS inverter performance degradation through the inversion voltage shifts measured during the application of rapid pulses. The observed degradation of the inversion voltage is described by an analytical equation that considers only the shifts of two device parameters, threshold voltage and mobility, of both transistors of the CMOS inverter.
AB - In this work, an 'on-the-fly' type technique for the characterization and monitoring of the CMOS inverter degradation, simultaneously to the application of pulsed voltage stresses, is presented. This technique allows analyzing the CMOS inverter performance degradation through the inversion voltage shifts measured during the application of rapid pulses. The observed degradation of the inversion voltage is described by an analytical equation that considers only the shifts of two device parameters, threshold voltage and mobility, of both transistors of the CMOS inverter.
KW - circuit performance degradation
KW - CMOS inverters
KW - CMOS technology
KW - device aging
KW - measurement technique
KW - simultaneous stress-characterization
UR - http://www.scopus.com/inward/record.url?scp=85102968134&partnerID=8YFLogxK
U2 - 10.1109/EUROSOI-ULIS49407.2020.9365566
DO - 10.1109/EUROSOI-ULIS49407.2020.9365566
M3 - Article
AN - SCOPUS:85102968134
JO - 2020 Joint International EUROSOI Workshop and International Conference on Ultimate Integration on Silicon, EUROSOI-ULIS 2020
JF - 2020 Joint International EUROSOI Workshop and International Conference on Ultimate Integration on Silicon, EUROSOI-ULIS 2020
ER -