© 2015 Published by Elsevier B.V. Abstract The implementation of high mobility devices requires growing III-V materials on silicon substrates. However, due to the lattice mismatch between these materials, III-V semiconductors tend to develop structural defects affecting device electrical characteristics. In this study, the CAFM technique is employed for identification and analysis of nanoscale defects, in particular, Threading Dislocations (TD), Stacking Faults (SF) and Anti-phase Boundaries (APB), in III-V materials grown over silicon wafers.
|Publication status||Published - 1 Nov 2015|
- High mobility substrates
- III-V semiconductors
- Threading Dislocations