Lifetime estimation of analog circuits from the electrical characteristics of stressed MOSFETs

J. Martín-Martínez, S. Gerardin, R. Rodríguez, M. Nafría, X. Aymerich, A. Cester, A. Paccagnella, G. Ghidini

Research output: Contribution to journalArticleResearchpeer-review

6 Citations (Scopus)

Abstract

In this work, the impact of dielectric degradation in the MOSFET electrical characteristics after different levels of Fowler-Nordheim (FN) stress has been studied. A decrease in ISAT and an increase of VT have been observed. The interface trap density has been extracted from the sub-threshold slope of ID-VGS curves. The results show a direct relation between the generated interfacial traps and the observed changes in saturation current and threshold voltage. The wear out effects in the devices have been extrapolated to operation voltages, pointing out that the transistors can fulfill the reliability criteria, even when working in analog applications. © 2007 Elsevier Ltd. All rights reserved.
Original languageEnglish
Pages (from-to)1349-1352
JournalMicroelectronics Reliability
Volume47
DOIs
Publication statusPublished - 1 Aug 2007

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