Influence of the interface trap location in the performance and variability of ultra-scaled MOSFETs

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Original language	English
Pages (from-to)	1243-1246
Journal	Microelectronics Reliability
Volume	53
Issue number	9
Publication status	Published - 1 Jan 2013

Cite this

@article{4db7685a6d144d42b4d10c29fd982ea7,

title = "Influence of the interface trap location in the performance and variability of ultra-scaled MOSFETs",

author = "V. Velayudhan and F. Gamiz and R. Rodriguez and M. Nafria and X. Aymerich and {Martin Martinez}, Javier",

year = "2013",

month = jan,

day = "1",

language = "English",

volume = "53",

pages = "1243--1246",

journal = "Microelectronics Reliability",

issn = "0026-2714",

publisher = "Elsevier Limited",

number = "9",

}

TY - JOUR

T1 - Influence of the interface trap location in the performance and variability of ultra-scaled MOSFETs

AU - Velayudhan, V.

AU - Gamiz, F.

AU - Rodriguez, R.

AU - Nafria, M.

AU - Aymerich, X.

AU - Martin Martinez, Javier

PY - 2013/1/1

Y1 - 2013/1/1

M3 - Article

VL - 53

SP - 1243

EP - 1246

JO - Microelectronics Reliability

JF - Microelectronics Reliability

SN - 0026-2714

IS - 9

ER -