Improving the Hardware Complexity by Exploiting the Reduced Dynamics-Based Fractional Order Systems

Nasim Ullah, Anees Ullah, Asier Ibeas, Jorge Herrera

Research output: Contribution to journalArticleResearchpeer-review

10 Citations (Scopus)

Abstract

© 2013 IEEE. Fractional calculus is finding increased usage in the modeling and control of nonlinear systems with the enhanced robustness. However, from the implementation perspectives, the simultaneous modeling of the systems and the design of controllers with fractional-order operators can bring additional advantages. In this paper, a fractional order model of a nonlinear system along with its controller design and its implementation on a field programmable gate array (FPGA) is undertaken as a case study. Overall, three variants of the controllers are designed, including classical sliding mode controller, fractional controller for an integer model of the plant, and a fractional controller for a fractional model of the plant (FCFP). A high-level synthesis approach is used to map all the variants of the controllers on FPGA. The integro-differential fractional operators are realized with infinite impulse response filters architecturally implemented as cascaded second-order sections to withstand quantization effects introduced by fixed-point computations necessary for FPGA implementations. The experimental results demonstrate that the fractional order sliding mode controller-based on fractional order plant (FCFP) exhibits reduced dynamics in sense of fractional integration and differentials. It is further verified that the FCFP is as robust as the classical sliding mode with comparable performance and computational resources.
Original languageEnglish
Article number7927701
Pages (from-to)7714-7723
JournalIEEE Access
Volume5
DOIs
Publication statusPublished - 1 Jan 2017

Keywords

  • chattering
  • computational resources
  • Fractional order control
  • nonlinear system

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