Abstract
© 1990-2012 IEEE. The release of the CUDA Kepler architecture in March 2012 has provided Nvidia GPUs with a larger register memory space and instructions for the communication of registers among threads. This facilitates a new programming strategy that utilizes registers for data sharing and reusing in detriment of the shared memory. Such a programming strategy can significantly improve the performance of applications that reuse data heavily. This paper presents a register-based implementation of the Discrete Wavelet Transform (DWT), the prevailing data decorrelation technique in the field of image coding. Experimental results indicate that the proposed method is, at least, four times faster than the best GPU implementation of the DWT found in the literature. Furthermore, theoretical analysis coincide with experimental tests in proving that the execution times achieved by the proposed implementation are close to the GPU's performance limits.
Original language | English |
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Article number | 6991550 |
Pages (from-to) | 3394-3406 |
Journal | IEEE Transactions on Parallel and Distributed Systems |
Volume | 26 |
DOIs | |
Publication status | Published - 1 Dec 2015 |
Keywords
- Compute Unified Device Architecture (CUDA)
- Discrete Wavelet Transform (DWT)
- Graphics Processing Unit (GPU)