Abstract
To investigate the impact of gate oxide degradation and breakdown (BD) on complimentary metal-oxide-semiconductor circuit functionality, an accurate description of the electrical characteristics of the stressed devices, which can be included in circuit simulators, is needed. In this paper, a description of the stressed device performance that considers, on the one hand, the variation of the channel current and, on the other, the increase in the gate current due to the oxide degradation and BD is presented, which is able to account for different levels of oxide damage. The parameters extracted from device experimental data have been introduced in a circuit simulator to evaluate the effect of the oxide degradation and BD on simple analog (current mirror) and digital [reset set (RS) latches] circuits. The impact of the increase in the gate leakage current and the variation of the conduction along the metal-oxide-semiconductor field-effect transistor channel due to the oxide degradation on the circuit performances has been separately analyzed. © 2008 IEEE.
Original language | English |
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Pages (from-to) | 997-1004 |
Journal | IEEE Transactions on Electron Devices |
Volume | 55 |
DOIs | |
Publication status | Published - 1 Apr 2008 |
Keywords
- Complimentary metal-oxide-semiconductor (CMOS)
- Dielectric breakdown (BD)
- Hard BD (HBD)
- Oxide reliability