TY - JOUR
T1 - FPGA Acceleration of Pre-Alignment Filters for Short Read Mapping With HLS
AU - Castells-Rufas, David
AU - Marco-Sola, Santiago
AU - Moure, Juan Carlos
AU - Aguado, Quim
AU - Espinosa, Antonio
PY - 2022/2/21
Y1 - 2022/2/21
N2 - Pre-alignment filters are useful for reducing the computational requirements of genomic sequence mappers. Most of them are based on estimating or computing the edit distance between sequences and their candidate locations in a reference genome using a subset of the dynamic programming table used to compute Levenshtein distance. Some of their FPGA implementations of use classic HDL toolchains, thus limiting their portability. Currently, most FPGA accelerators offered by heterogeneous cloud providers support C/C++ HLS. In this work, we implement and optimize several state-of-the-art pre-alignment filters using C/C++ based-HLS to expand their portability to a wide range of systems supporting the OpenCL runtime. Moreover, we perform a complete analysis of the performance and accuracy of the filters and analyze the implications of the results. The maximum throughput obtained by an exact filter is 95.1 MPairs/s including memory transfers using 100 bp sequences, which is the highest ever reported for a comparable system and more than two times faster than previous HDL-based results. The best energy efficiency obtained from the accelerator (not considering host CPU) is 2.1 MPairs/J, more than one order of magnitude higher than other accelerator-based comparable approaches from the state of the art.
AB - Pre-alignment filters are useful for reducing the computational requirements of genomic sequence mappers. Most of them are based on estimating or computing the edit distance between sequences and their candidate locations in a reference genome using a subset of the dynamic programming table used to compute Levenshtein distance. Some of their FPGA implementations of use classic HDL toolchains, thus limiting their portability. Currently, most FPGA accelerators offered by heterogeneous cloud providers support C/C++ HLS. In this work, we implement and optimize several state-of-the-art pre-alignment filters using C/C++ based-HLS to expand their portability to a wide range of systems supporting the OpenCL runtime. Moreover, we perform a complete analysis of the performance and accuracy of the filters and analyze the implications of the results. The maximum throughput obtained by an exact filter is 95.1 MPairs/s including memory transfers using 100 bp sequences, which is the highest ever reported for a comparable system and more than two times faster than previous HDL-based results. The best energy efficiency obtained from the accelerator (not considering host CPU) is 2.1 MPairs/J, more than one order of magnitude higher than other accelerator-based comparable approaches from the state of the art.
KW - Field programmable gate arrays
KW - OpenCL
KW - acceleration
KW - bioinformatics
KW - hardware
KW - pre-alignment filters
KW - read mapping
KW - sequence alignment
UR - http://www.scopus.com/inward/record.url?scp=85125345837&partnerID=8YFLogxK
U2 - 10.1109/ACCESS.2022.3153032
DO - 10.1109/ACCESS.2022.3153032
M3 - Article
SN - 2169-3536
VL - 10
SP - 22079
EP - 22100
JO - IEEE Access
JF - IEEE Access
ER -