Fabrication of CMOS retrograde wells by doping compensation with ion implantation

J. Montserrat, J. Bausells, E. Lora-Tamayo, F. Serra-Mestres

Research output: Contribution to journalArticleResearchpeer-review

Abstract

A process for a retrograde well obtained by partial compensation of doping in the surface region is described. This structure is useful to reduce the latch-up susceptibility in CMOS technology. The process has been designed using the SUPREM program. Sample characterization has been carried out by the spreading resistance technique and by the four-point probe method. Good agreement has been obtained between simulated and experimental values. © 1989.
Original languageEnglish
Pages (from-to)687-690
JournalVacuum
Volume39
Issue number7-8
DOIs
Publication statusPublished - 1 Jan 1989

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