Abstract
A process for a retrograde well obtained by partial compensation of doping in the surface region is described. This structure is useful to reduce the latch-up susceptibility in CMOS technology. The process has been designed using the SUPREM program. Sample characterization has been carried out by the spreading resistance technique and by the four-point probe method. Good agreement has been obtained between simulated and experimental values. © 1989.
Original language | English |
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Pages (from-to) | 687-690 |
Journal | Vacuum |
Volume | 39 |
Issue number | 7-8 |
DOIs | |
Publication status | Published - 1 Jan 1989 |