Electrical Characterization of Emerging Transistor Technologies: Issues and Challenges

Max Haferlach, Anibal Pacheco-Sanchez, Paulius Sakalas, Mihaela Alexandru, Sascha Hermann, Tobias Nardmann, Michael Schroter, Martin Claus

Research output: Contribution to journalArticleResearchpeer-review


Experimental results gained by various electrical characterization techniques are discussed and compared for a CNTFET technology, which suffers as almost all emerging technologies from traps in the gate oxide. Based on these results, it is highlighted that, contrary to common practice, a fast data acquisition technique is required to ensure a proper electrical device characterization in terms of 1) trap-free device characteristics, 2) reproducible experimental results, and 3) a consistent set of dc and small-signal (ac) characteristics. It is argued that a reasonable technology comparison among emerging technologies must be based on data fulfilling these criteria since trap-affected measurements distort the device behavior which can lead to wrong conclusions about the performance of a device such as the apparent linearity. A trap model capturing the aforementioned issues is briefly introduced. Moreover, the challenges of the electrical characterization of high-impedance devices are explored.
Original languageEnglish
Pages (from-to)619 - 626
Number of pages8
JournalIEEE Transactions on Nanotechnology
Issue number4
Publication statusPublished - 1 Jul 2016


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