In this paper we present an electronic system designed to emulate neural networks. Two major restrictions are assumed: discrete synapses (+1,0,-1) and threshold-type neurons. Drawbacks given by restrictions are solved with a more complex learning algorithm that maps real valued configurations for synapses into bipolar ones. The central unit of the system is an ASIC designed in accordance with a new sequential dynamics, which is faster and with better recall characteristics. As a result, the system designed has a fast recall phase and a large number of neurons. A handwritten OCR system is being designed. © 1992.
|Journal||Microprocessing and Microprogramming|
|Publication status||Published - 1 Jan 1992|