Digital neural network system based in new concepts on the recall phase dynamics

J. Carrabina, J. C. Calderon, F. Lisa, C. Perez, F. Garrido, N. Avellana, E. Valderrama

    Research output: Contribution to journalArticleResearchpeer-review

    Abstract

    In this paper we present an electronic system designed to emulate neural networks. Two major restrictions are assumed: discrete synapses (+1,0,-1) and threshold-type neurons. Drawbacks given by restrictions are solved with a more complex learning algorithm that maps real valued configurations for synapses into bipolar ones. The central unit of the system is an ASIC designed in accordance with a new sequential dynamics, which is faster and with better recall characteristics. As a result, the system designed has a fast recall phase and a large number of neurons. A handwritten OCR system is being designed. © 1992.
    Original languageEnglish
    Pages (from-to)89-92
    JournalMicroprocessing and Microprogramming
    Volume34
    DOIs
    Publication statusPublished - 1 Jan 1992

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