The evolution of the electrical properties of HfO2/SiO 2/Si dielectric stacks under electrical stress has been investigated using atomic force microscope-based techniques. The current through the grain boundaries (GBs), which is found to be higher than thorough the grains, is correlated to a higher density of positively charged defects at the GBs. Electrical stress produces different degradation kinetics in the grains and GBs, with a much shorter time to breakdown in the latter, indicating that GBs facilitate dielectric breakdown in high-k gate stacks. © 2011 American Institute of Physics.
|Journal||Applied Physics Letters|
|Publication status||Published - 5 Sep 2011|