Coprocessor for real-time dynamic vertical migration

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    A method for Dynamic Vertical Migration based on the inclusion of a coprocessor is described. It optimally runs without firmware monitoring techniques and can be applied with neither knowledge of loops bounds, nor their microprogrammability. The coprocessor generates, for every instruction, an interconnection between the instruction and its microprogram execution code. This interconnections are stored in a coprocessor memory saving the fetching and decoding phases in subsequent executions. The coprocessor structure is organized around three basic elements. Interconnection Memory, Interconnection Memory Management Unit and Coprocessor Control Unit. The behaviour of the Interconnection Memory Management Unit has been studied for two different replacement algorithms. © 1987.
    Original languageEnglish
    Pages (from-to)197-202
    JournalMicroprocessing and Microprogramming
    Publication statusPublished - 1 Jan 1987


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