TY - JOUR
T1 - Conductance of Threading Dislocations in InGaAs/Si Stacks by Temperature-CAFM Measurements
AU - Couso, C.
AU - Iglesias, V.
AU - Porti, M.
AU - Claramunt, S.
AU - Nafría, M.
AU - Domingo, N.
AU - Cordes, A.
AU - Bersuker, G.
PY - 2016/5/1
Y1 - 2016/5/1
N2 - © 1980-2012 IEEE. The stacks of III-V materials, grown on the Si substrate, that are considered for the fabrication of highly scaled devices tend to develop structural defects, in particular threading dislocations (TDs), which affect device electrical properties. We demonstrate that the characteristics of the TD sites can be analyzed by using the conductive atomic force microscopy technique with nanoscale spatial resolution within a wide temperature range. In the studied InGaAs/Si stacks, electrical conductance through the TD sites was found to be governed by the Poole-Frenkel emission, while the off-TDs conductivity is dominated by the thermionic emission process.
AB - © 1980-2012 IEEE. The stacks of III-V materials, grown on the Si substrate, that are considered for the fabrication of highly scaled devices tend to develop structural defects, in particular threading dislocations (TDs), which affect device electrical properties. We demonstrate that the characteristics of the TD sites can be analyzed by using the conductive atomic force microscopy technique with nanoscale spatial resolution within a wide temperature range. In the studied InGaAs/Si stacks, electrical conductance through the TD sites was found to be governed by the Poole-Frenkel emission, while the off-TDs conductivity is dominated by the thermionic emission process.
KW - CAFM
KW - Poole Frenkel emission
KW - semiconductor defects
KW - thermionic emission
KW - threading dislocation
UR - https://ddd.uab.cat/record/163088
U2 - https://doi.org/10.1109/LED.2016.2537051
DO - https://doi.org/10.1109/LED.2016.2537051
M3 - Article
VL - 37
SP - 640
EP - 643
JO - IEEE Electron Device Letters
JF - IEEE Electron Device Letters
SN - 0741-3106
M1 - 7422696
ER -