Circuit design-oriented stochastic piecewise modeling of the postbreakdown gate current in MOSFETs: Application to ring oscillators

Javier Martin-Martinez, Ben Kaczer, Robin Degraeve, Philippe J. Roussel, Rosana Rodriguez, Montserrat Nafria, Xavier Aymerich, B. Dierickx, Guido Groeseneken

Research output: Contribution to journalArticleResearchpeer-review

9 Citations (Scopus)

Abstract

A methodology to incorporate the MOSFET gate dielectric breakdown (BD) failure mechanism in the design of complex systems is presented. The model accounts for the statistical nature of the BD phenomenon, is easily extensible to different device geometries and operation conditions (following the established scaling rules for the mechanism), considers the stress history, and can be easily implemented in circuit simulation tools. Device level characterization of the BD mechanism is presented, which is the base for model parameter extraction. The model has been introduced in a circuit simulator to show its suitability for evaluation of the BD effect in circuits and their reliability, taking ring oscillators as example. © 2011 IEEE.
Original languageEnglish
Article number5955107
Pages (from-to)78-85
JournalIEEE Transactions on Device and Materials Reliability
Volume12
Issue number1
DOIs
Publication statusPublished - 1 Mar 2012

Keywords

  • Circuit simulation
  • CMOS
  • dielectric breakdown
  • reliability

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