The spatial distribution of electron traps in silicon nitride is determined by modelling the discharge of electrons out of nitride traps in metal-nitride-oxide-semiconductor (MNOS) structures subjected to low positive gate voltages. We assume a uniform density of capture centres in the nitride bulk and a high level of near-interface traps, which are modelled according to an exponentially decreasing distribution. By comparing the experimental data on field-assisted discharge of MNOS devices with the results derived from the proposed model, the bulk trap density has been found to be more than one order of magnitude lower than the interface trap density. We point out the strong influence of the interface traps on the memory action of MNOS devices and we discuss the reasons leading to such an excess of electron capture centres in the SiO2-Si3N4 boundary. The distribution of traps obtained provides a good description of the discharge process, thus supporting the validity of the proposed method as a new approach for the characterization of MNOS devices. © 1992.