Atomic layer deposited (TiO <inf>2</inf>) <inf>x</inf>(Al <inf>2</inf>O <inf>3</inf>) <inf>1-x</inf>/In <inf>0.53</inf>Ga <inf>0.47</inf>As gate stacks for III-V based metal-oxide-semiconductor field-effect transistor applications

C. Mahata, S. Mallik, T. Das, C. K. Maiti, G. K. Dalapati, C. C. Tan, C. K. Chia, H. Gao, M. K. Kumar, S. Y. Chiam, H. R. Tan, H. L. Seng, D. Z. Chi, E. Miranda

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Abstract

Atomic layer deposited (ALD) (TiO 2) x(Al 2O 3) 1-x(TiAlO) alloy gate dielectrics on In 0.47Ga 0.53As/InP substrates are shown to produce high quality interfaces between TiAlO and InGaAs. The surface morphology and interfacial reaction of nanolaminate ALD TiAlO on In 0.53Ga 0.47As are studied using atomic force microscopy and x-ray photoelectron spectroscopy. Measured valence and conduction band offsets are found to be 2.85 ± 0.05 and 1.25 ± 0.05 eV, respectively. Capacitance-voltage characteristics show low frequency dispersion (∼11), interface state density (∼4.2 × 10 11cm -2eV -1), and hysteresis voltage (∼90 mV). Ga-O and As-O bonding are found to get suppressed in the gate stacks after post deposition annealing. Our experimental results suggest that higher oxidation states of In and Ga at the In 0.53Ga 0.47As surface and As diffusion in the dielectric are effectively controlled by Ti incorporation in Al 2O 3. © 2012 American Institute of Physics.
Original languageEnglish
Article number062905
JournalApplied Physics Letters
Volume100
Issue number6
DOIs
Publication statusPublished - 6 Feb 2012

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