TY - BOOK
T1 - An IC Array for the Statistical Characterization of Time-Dependent Variability of Basic Circuit Blocks
AU - Martin-Lloret, P.
AU - Nuñez, J.
AU - Roca, E.
AU - Castro-Lopez, R.
AU - Martin-Martinez, J.
AU - Rodriguez, R.
AU - Nafria, M.
AU - Fernandez, F. V.
N1 - Publisher Copyright:
© 2019 IEEE.
PY - 2019/7
Y1 - 2019/7
N2 - This paper presents an integrated circuit (IC) array whose purpose is to observe, quantify and characterize the impact of time-dependent variability effects, like aging, in several widely used digital and analog circuit blocks. With the increasing interest that this kind of mechanism has attracted in the last years, for its potential impact in the reliability of ultra-scaled integrated circuits, it is only relevant that appropriate measures are taken to find out how it can be included (and thus mitigated) in the design process of such integrated circuits. And, while substantial literature exists that covers the device level, time-dependent variability at circuit level has not been as equally studied. This work complements our previous efforts in providing a holistic approach to Reliability-Aware Design: from statistical characterization and modeling at device-level, to simulation, and into optimization-based design with reliability considerations, the array presented here provides one more step towards a thorough and accurate understanding of how time-dependent variability works at the circuit level.
AB - This paper presents an integrated circuit (IC) array whose purpose is to observe, quantify and characterize the impact of time-dependent variability effects, like aging, in several widely used digital and analog circuit blocks. With the increasing interest that this kind of mechanism has attracted in the last years, for its potential impact in the reliability of ultra-scaled integrated circuits, it is only relevant that appropriate measures are taken to find out how it can be included (and thus mitigated) in the design process of such integrated circuits. And, while substantial literature exists that covers the device level, time-dependent variability at circuit level has not been as equally studied. This work complements our previous efforts in providing a holistic approach to Reliability-Aware Design: from statistical characterization and modeling at device-level, to simulation, and into optimization-based design with reliability considerations, the array presented here provides one more step towards a thorough and accurate understanding of how time-dependent variability works at the circuit level.
KW - Aging
KW - Analog Circuits
KW - Bias Temperature Instability
KW - Hot Carrier Injection
KW - Random Telegraph Noise
KW - Time-Dependent Variability
UR - http://www.scopus.com/inward/record.url?scp=85071579290&partnerID=8YFLogxK
U2 - 10.1109/SMACD.2019.8795277
DO - 10.1109/SMACD.2019.8795277
M3 - Proceeding
AN - SCOPUS:85071579290
T3 - SMACD 2019 - 16th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design, Proceedings
BT - An IC Array for the Statistical Characterization of Time-Dependent Variability of Basic Circuit Blocks
PB - Institute of Electrical and Electronics Engineers Inc.
ER -