TY - JOUR
T1 - A smart noise- and RTN-removal method for parameter extraction of CMOS aging compact models
AU - Diaz-Fortuny, Javier
AU - Martin-Martinez, Javier
AU - Rodriguez, Rosana
AU - Castro-Lopez, Rafael
AU - Roca, Elisenda
AU - Fernandez, Francisco V.
AU - Nafria, Montserrat
PY - 2019/9/1
Y1 - 2019/9/1
N2 - In modern nanometer-scale CMOS technologies, time-zero and time-dependent variability (TDV) effects, the latter coming from aging mechanisms like Bias Temperature Instability (BTI), Hot Carrier Injection (HCI) or Random Telegraph Noise (RTN), have re-emerged as a serious threat affecting the performance of analog and digital integrated circuits. Variability induced by the aging phenomena can lead circuits to a progressive malfunction or failure. In order to understand the effects of the mentioned variability sources, a precise and sound statistical characterization and modeling of these effects should be done. Typically, transistor TDV characterization entails long, and typically prohibitive, testing times, as well as huge amounts of data, which are complex to post-process. In order to face these limitations, this work presents a new method to statistically characterize the emission times and threshold voltage shifts (Delta V-th) related to oxide defects in nanometer CMOS transistors during aging tests. At the same time, the aging testing methodology significantly reduces testing times by parallelizing the stress. The method identifies the V-th drops associated to oxide trap emissions during BTI and HCI aging recovery traces while removing RTN and background noise contributions, to avoid artifacts during data analysis.
AB - In modern nanometer-scale CMOS technologies, time-zero and time-dependent variability (TDV) effects, the latter coming from aging mechanisms like Bias Temperature Instability (BTI), Hot Carrier Injection (HCI) or Random Telegraph Noise (RTN), have re-emerged as a serious threat affecting the performance of analog and digital integrated circuits. Variability induced by the aging phenomena can lead circuits to a progressive malfunction or failure. In order to understand the effects of the mentioned variability sources, a precise and sound statistical characterization and modeling of these effects should be done. Typically, transistor TDV characterization entails long, and typically prohibitive, testing times, as well as huge amounts of data, which are complex to post-process. In order to face these limitations, this work presents a new method to statistically characterize the emission times and threshold voltage shifts (Delta V-th) related to oxide defects in nanometer CMOS transistors during aging tests. At the same time, the aging testing methodology significantly reduces testing times by parallelizing the stress. The method identifies the V-th drops associated to oxide trap emissions during BTI and HCI aging recovery traces while removing RTN and background noise contributions, to avoid artifacts during data analysis.
KW - Aging
KW - BTI
KW - CMOS
KW - Defects
KW - Extraction
KW - HCI
KW - Method
KW - Parameters
KW - RTN
UR - http://www.mendeley.com/research/smart-noise-rtnremoval-method-parameter-extraction-cmos-aging-compact-models
M3 - Article
SN - 0038-1101
VL - 159
SP - 99
EP - 105
JO - SOLID-STATE ELECTRONICS
JF - SOLID-STATE ELECTRONICS
ER -