TY - JOUR
T1 - A 2 kfps sub-μW/pix uncooled-pbse digital imager with 10 bit dr adjustment and fpn correction for high-speed and low-Cost MWIR applications
AU - Margarit, Josep Maria
AU - Vergara, German
AU - Villamayor, Victor
AU - Gutierrez-Alvarez, Raul
AU - Fernandez-Montojo, Carlos
AU - Teres, Lluis
AU - Serra-Graells, Francisco
PY - 2015/10/1
Y1 - 2015/10/1
N2 - © 2015 IEEE. Mid-wavelength infrared (MWIR) thermography is an emerging technology with promising applications such as industrial monitoring, medicine and automotive, but its use in high-speed cameras is not yet widespread due to the lack of inexpensive sensor integration solutions and their common reliance on bulky cooling mechanisms. This work fills the gap by presenting a monolithic uncooled high-speed imager based on vapor-phase deposition lead selenide (VPD PbSe) photoconductors and a fully digital and configurable CMOS read-out integrated circuit (ROIC) to operate the MWIR imager. This ROIC features cancellation of PbSe dark current, compensation of its output capacitance and correction of the fixed pattern noise (FPN) caused by process non-uniformities in CMOS fabrication and detector deposition. The low-cost 80 × 80 imager has been integrated using 0.35 μm 2P4M standard CMOS technology and PbSe detector post-processing with 135 μm pixel pitch and 68% fill factor values. Experimental opto-electrical performance exhibits 10 bit real-time FPN compensation and DR calibration over the entire focal plane operating at 2 kfps, sub-0.5 LSB inter-pixel crosstalk, sub-μW pixel power consumption, and an overall figure of merit of 55 mK × ms.
AB - © 2015 IEEE. Mid-wavelength infrared (MWIR) thermography is an emerging technology with promising applications such as industrial monitoring, medicine and automotive, but its use in high-speed cameras is not yet widespread due to the lack of inexpensive sensor integration solutions and their common reliance on bulky cooling mechanisms. This work fills the gap by presenting a monolithic uncooled high-speed imager based on vapor-phase deposition lead selenide (VPD PbSe) photoconductors and a fully digital and configurable CMOS read-out integrated circuit (ROIC) to operate the MWIR imager. This ROIC features cancellation of PbSe dark current, compensation of its output capacitance and correction of the fixed pattern noise (FPN) caused by process non-uniformities in CMOS fabrication and detector deposition. The low-cost 80 × 80 imager has been integrated using 0.35 μm 2P4M standard CMOS technology and PbSe detector post-processing with 135 μm pixel pitch and 68% fill factor values. Experimental opto-electrical performance exhibits 10 bit real-time FPN compensation and DR calibration over the entire focal plane operating at 2 kfps, sub-0.5 LSB inter-pixel crosstalk, sub-μW pixel power consumption, and an overall figure of merit of 55 mK × ms.
KW - CMOS
KW - digital pixel sensor (DPS)
KW - fixed pattern noise (FPN)
KW - high speed
KW - imager
KW - infrared
KW - low cost
KW - low power
KW - MWIR
KW - PbSe
KW - Uncooled
U2 - 10.1109/JSSC.2015.2464672
DO - 10.1109/JSSC.2015.2464672
M3 - Article
VL - 50
SP - 2394
EP - 2405
JO - IEEE Journal of Solid-State Circuits
JF - IEEE Journal of Solid-State Circuits
SN - 0018-9200
IS - 10
M1 - 7236938
ER -