The goals of this project are set in the framework of the simulation, modeling and characterization of semiconductor devices with application to sub-45nm nanoelectronic technologies. Non-conventional CMOS devices will be considered for applications in the near future, as well as emergent logical devices that could find an application in a longer timescale, such as nanotube-and nanowire-based field effect transistors and spin transistors (...). We set objectives of simulating and compact modeling field effect transistors with 1D channels implemented with carbon nanotubes and silicon nanowires. Transport in silicon nanowires will be simulated with first principles techniques, focusing on the study of the variability originating from different positional configurations of impurities. On the other hand, electronic spin will be added to the MC simulator with the purpose of studying spin transport in semi-classical transport conditions and analyzing the behaviour of the Datta-Das spin transistor and the resonant spin lifetime transistor. We will highlight as a goal underlying the whole project the issues associated to the parameter variability derived from atomic scale fluctuactions in the position and number of defects generated during device operation, impacting on the device reliability. In this area, we also propose the development of a stochastic simulator of the degradation of gate oxide and its electrical characterization in small area transistors in which an experimental defect-to-defect follow-up can be made
|Effective start/end date||1/10/06 → 30/09/09|
- Universitat Autònoma de Barcelona (UAB)
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