Codisseny de sistemes concurrents heterogenis: hardware i aplicació

    Project Details


    The proposal here presented is a multidisciplinary project that covers different areas of Computer Science (formal methods, hardware/software codesign, concurrency, etc.) to create a framework and a design methodology for heterogeneus concurrent systems. The project combines basic research and activities with application to the industrial environment. The techniques proposed in the project will be integrated in existing design tools: POLIS (from Cadence European Labs) and petrify (tool designed by UPC for the synthesis of asynchronous systems currently used by Intel, Philips Research, Cogency Technology and the University of Manchester, among others). POLIS will be used as design framework in two industrial applications: a system for monitoring the electrical network (company AUROTRONICS) and a microsystem for washing machine control (company FAGOR). Besides the industrial results, the project will provide, as scientific results, a set of techniques for automatic synthesis and verification of concurrent systems using formalisms based on Petri nets. The project pursues these techniques to have a significant impact on the research currently carried out in this area. The activities of the project are directly related to three ESPRIT projects in which the research team is participating: COSY (COdesign, Simulation and sYnthesis), ACiD (Asynchronous Circuit Design) and "Library free IC Design for Submicron Technologies".
    Effective start/end date1/12/9830/11/01

    Collaborative partners


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