Keyphrases
Design for Testability
66%
Monolithic Detector
66%
Testability
66%
Detector System
66%
Layout Level
58%
Level Design
58%
Integrated Circuits
50%
SRAM-based FPGA
41%
Cell Library
41%
Physical Design
41%
Spatiotemporal Analysis
33%
Optimization Model
33%
Very Low Power
33%
Venous Congestion
33%
Tool Flow
33%
Error Resilience
33%
Error Modeling
33%
Inertial Navigation System
33%
Tracking Particles
33%
Permanent Fault
33%
FPGA-based
33%
Reconfigurable Platform
33%
Dynamically Reconfigurable
33%
VHDL-AMS
33%
Security Algorithms
33%
Montgomery Modular multiplication
33%
Acceleration Techniques
33%
Implementation on FPGA
33%
Low Power Wireless Sensors
33%
Secure Applications
33%
Test Pattern Generator
33%
Design Rules
33%
Communication Controller
33%
Multi-protocol
33%
Silicon-on-insulator
33%
Capacitive Sensing
33%
NMOS
33%
Energy Management
33%
Readout Integrated Circuit
33%
Catheter
33%
System Integration
33%
Power Supply
33%
Well-being
33%
Hospital-acquired
33%
Filter Implementation
33%
Small Ruminants
33%
Micro-electro-mechanical Systems
33%
Wireless Sensor Networks
33%
Subcutaneous Injection
33%
Sensing Platform
33%
Engineering
Integrated Circuit
100%
Testability
66%
Detector System
66%
Field Programmable Gate Arrays
66%
Silicon on Insulator Technology
55%
Readout Circuit
44%
Amplifier
44%
Lookup Table
36%
Bitstream
36%
Microelectromechanical System
33%
Thermal System
33%
Silicon on Insulator
33%
Pattern Generator
33%
Application Specific Integrated Circuit
33%
Smart Sensors
33%
Active Layer
33%
Design Rule
33%
Demand Management
33%
Simulation Tool
33%
Learning Curve
33%
Oxide Layer
33%
Power Supply
33%
Sensor Bus
33%
Capacitive
33%
Petri Net Model
33%
Feasible Solution
33%
Wireless Sensor Network
33%
Peak Time
33%
Airspace User
33%
Strategic Decision
33%
Daily Operation
33%
Tactical Decision
33%
Inertial Navigation System
33%
Error Modeling
33%
Integrated System
33%
Micro-Electro-Mechanical System
33%
Interdependency
33%
Global Positioning System
33%
Infrared Laser
33%
Minimal Path
16%
Hardware Overhead
16%
Level Switch
16%
Logic Function
16%
Fits and Tolerances
16%
Error Detection
16%
Partial Reconfiguration
16%
Band Gap
16%
Computer Aided Design
16%
Integrated System
16%
Granularity
16%
Computer Science
Field Programmable Gate Arrays
100%
Testability Rule
66%
Physical Design
44%
Application Specific Integrated Circuit
44%
Management Tool
40%
Speed-up
40%
Modem
33%
Case Study
33%
Feasible Solution
33%
Security Analysis
33%
Test Generation
33%
Key Management
33%
Interdependency
33%
Oriented Graph
33%
public key
33%
Side Channel
33%
Secure Algorithm
33%
Security Countermeasure
33%
Channel Analysis
33%
Related Quantity
33%
Constraint Programming
33%
Permanent Fault
33%
Capacity Management
33%
Demand Management
33%
Communication Protocol
33%
Integrated Circuit
33%
User Preference
33%
Colored Petri Net
33%
Wireless Sensor Network
33%
Particle Filter
33%
Computer Hardware
33%
Reconfiguration
29%
Fault Injection
20%
fault-tolerance
16%
Error Detection
16%
Majority Voting
16%
Memory Configuration
16%
Electronic System
16%
Granularity
16%
Hardware Overhead
16%
Technology Mapping
16%
Computer Aided Design
16%
Equivalence Model
13%
Synthesis Tool
11%
Oriented Protocol
11%
Automatic Synthesis
11%
Operation Mode
11%
Public Switched Telephone Network
11%
Performance Degradation
11%
Good Candidate
6%
