Threading dislocations in III-V semiconductors: Analysis of electrical conduction

V. Iglesias, M. Porti, C. Couso, Q. Wu, S. Claramunt, M. Nafría, E. Miranda, N. Domingo, G. Bersuker, A. Cordes

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Resum

The implementation of devices with high mobility substrates requires growing III-V semiconductors over the underlying silicon substrates. However, due to the lattice mismatch, III-V materials tend to develop a significant density of structural defects, which may affect the device electrical characteristics. In this study, Threading Dislocation (TD) defects, which may propagate through the III-V layers, were studied using Conductive Atomic force Microscopy (CAFM). This technique is shown to be effective for identification and analysis at the nanoscale of the pre- and post-electrically stressed TD. The TD conduction studied at different temperatures (T) is shown to be consistent with the Poole-Frenkel (PF) emission process.

Idioma originalEnglish
Pàgines (de-a)CD41-CD46
Nombre de pàgines6
RevistaIEEE International Reliability Physics Symposium Proceedings
DOIs
Estat de la publicacióPublicada - 26 de maig 2015

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