Modeling of the post-breakdown IG-VG-VD characteristics of La2O3-based MOS transistors

E. Miranda; J. Sune; T. Kawanago; K. Kakushima; H. Iwai

doi:10.1109/CDE.2013.6481391

Modeling of the post-breakdown I_G-V_G-V_D characteristics of La₂O₃-based MOS transistors

E. Miranda^*, J. Sune, T. Kawanago, K. Kakushima, H. Iwai

^*Autor corresponent d’aquest treball

Departament d'Enginyeria Electrònica

Tokyo Institute of Technology (Tokyo Tech)

Producció científica: Contribució a revista › Article › Recerca › Avaluat per experts

Resum

A simple analytic model for the post-breakdown conduction characteristics in W/La₂O₃/p-type Si MOSFETs is reported. The model is based on the solution of the generalized diode equation and captures the behavior of the gate current (I_G) as a function of the gate (V _G) and drain (V_D) voltages including both positive and negative biases. The devices were subjected to ramped voltage stress so as to induce the dielectric breakdown close to or at the transistor drain region.

Idioma original	Anglès
Pàgines (de-a)	257-260
Nombre de pàgines	4
Revista	Proceedings of the 2013 Spanish Conference on Electron Devices, CDE 2013
DOIs	https://doi.org/10.1109/CDE.2013.6481391
Estat de la publicació	Publicada - 2013

Accés al document

10.1109/CDE.2013.6481391

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Com citar-ho

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abstract = "A simple analytic model for the post-breakdown conduction characteristics in W/La2O3/p-type Si MOSFETs is reported. The model is based on the solution of the generalized diode equation and captures the behavior of the gate current (IG) as a function of the gate (V G) and drain (VD) voltages including both positive and negative biases. The devices were subjected to ramped voltage stress so as to induce the dielectric breakdown close to or at the transistor drain region.",

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author = "E. Miranda and J. Sune and T. Kawanago and K. Kakushima and H. Iwai",

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AU - Iwai, H.

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AB - A simple analytic model for the post-breakdown conduction characteristics in W/La2O3/p-type Si MOSFETs is reported. The model is based on the solution of the generalized diode equation and captures the behavior of the gate current (IG) as a function of the gate (V G) and drain (VD) voltages including both positive and negative biases. The devices were subjected to ramped voltage stress so as to induce the dielectric breakdown close to or at the transistor drain region.

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KW - reliability

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M3 - Article

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JO - Proceedings of the 2013 Spanish Conference on Electron Devices, CDE 2013

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