Aging in CMOS RF linear power amplifiers: Experimental comparison and modeling

Xavier Aragones, Diego Mateo, Enrique Barajas, Albert Crespo-Yepes, Rosana Rodríguez, Javier Martin-Martinez, Montserrat Nafría

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Resum

This paper characterizes experimentally the aging degradation experienced by two different 2.45 GHz power amplifier circuits of similar performance, implemented in a 65 nm CMOS technology. Results demonstrate the importance of the topology selection in order to guarantee robustness against aging effects, and thus the need to predict MOS parameter degradation during the design phase, accounting for the actual DC and RF operation conditions. For that purpose, we propose a semi-empirical compact model that, based on the RMS equivalent voltages at the transistor terminals during circuit operation, can provide an estimation of the aging degradation.

Idioma originalEnglish
EditorInstitute of Electrical and Electronics Engineers Inc.
ISBN (electrònic)9781728103976
DOIs
Estat de la publicacióPublicada - 2019

Sèrie de publicacions

NomProceedings - IEEE International Symposium on Circuits and Systems
Volum2019-May
ISSN (imprès)0271-4310

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